Non-Uniform Memory Access (NUMA) is a computer memory design where memory access time depends on the proximity of a processor to the memory that it accesses. A NUMA architecture usually includes several nodes that each have one or more processors, local memory on each node, and a local bus on each node connecting a node's processor(s) to its memory. A high speed communication network (e.g., QPI, HyperTransport™, etc.) interconnects each of the NUMA nodes.
Memory access time depends on whether a processor accesses memory on a local or remote node. Memory access time for remote memory usually takes longer than local memory because remote memory accesses travel across the communication network. Data sharing occurs in NUMA systems when a processor modifies an element of a cache line, causing other processors accessing the cache line to obtain an updated version of the cache line. False sharing generally occurs when unrelated data items on the same cache line are modified in close temporal proximity by multiple processors. In general, data sharing can result in significant performance degradation and false sharing is challenging to detect.